module carry_block(a,b,carryin,carry);
	input [3:0] a, b; /* add these bits*/
	input carryin; /* carry into the block */
	output [3:0] carry; /* carries for each bit in the block */
	wire [3:0] g, p; /* generate and propagate */

	assign g[0] = a[0] & b[0]; /* generate 0 */
	assign p[0] = a[0] ^ b[0]; /* propagate 0 */
	assign g[1] = a[1] & b[1]; /* generate 1 */
	assign p[1] = a[1] ^ b[1]; /* propagate 1 */
	assign g[2] = a[2] & b[2]; /* generate 2 */
	assign p[2] = a[2] ^ b[2]; /* propagate 2 */
	assign g[3] = a[3] & b[3]; /* generate 3 */
	assign p[3] = a[3] ^ b[3]; /* propagate 3 */
	assign carry[0] = g[0] | (p[0] & carryin);
	assign carry[1] = g[1] | p[1] & (g[0] | (p[0] & carryin));
	assign carry[2] = g[2] | p[2] & 
		(g[1] | p[1] & (g[0] | (p[0] & carryin)));
	assign carry[3] = g[3] | p[3] & 
		(g[2] | p[2] & (g[1] | p[1] & (g[0] | (p[0] & carryin))));

endmodule