module nbitfulladd(a,b,carryin,sum,carryout);
	input [7:0] a, b; /* add these bits */
	input carryin; /* carry in*/
	output [7:0] sum; /* result */
	output carryout;
	wire [7:1] carry; /* transfers the carry between bits */

	fulladd a0(a[0],b[0],carryin,sum[0],carry[1]);
	fulladd a1(a[1],b[1],carry[1],sum[1],carry[2]);
	fulladd a2(a[2],b[2],carry[2],sum[2],carry[3]);
	fulladd a3(a[3],b[3],carry[3],sum[3],carry[4]);
	fulladd a4(a[4],b[4],carry[4],sum[4],carry[5]);
	fulladd a5(a[5],b[5],carry[5],sum[5],carry[6]);
	fulladd a6(a[6],b[6],carry[6],sum[6],carry[7]);
	fulladd a7(a[7],b[7],carry[7],sum[7],carryout);
endmodule